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System | : | Linux MiraNet 3.0.0-14-generic-pae #23-Ubuntu SMP Mon Nov 21 22:07:10 UTC 2011 i686 |
Software | : | Apache. PHP/5.3.6-13ubuntu3.10 |
ID | : | uid=65534(nobody) gid=65534(nogroup) groups=65534(nogroup)
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Safe Mode | : | OFF |
Open_Basedir | : | OFF |
Freespace | : | 20.46 GB of 70.42 GB (29.05%) |
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MySQL: ON MSSQL: OFF Oracle: OFF PostgreSQL: OFF Curl: OFF Sockets: ON Fetch: OFF Wget: ON Perl: ON |
Disabled Functions: pcntl_alarm,pcntl_fork,pcntl_waitpid,pcntl_wait,pcntl_wifexited,pcntl_wifstopped,pcntl_wifsignaled,pcntl_wexitstatus,pcntl_wtermsig,pcntl_wstopsig,pcntl_signal,pcntl_signal_dispatch,pcntl_get_last_error,pcntl_strerror,pcntl_sigprocmask,pcntl_sigwaitinfo,pcntl_sigtimedwait,pcntl_exec,pcntl_getpriority,pcntl_setpriority,
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[ System Info ]
[ Processes ]
[ SQL Manager ]
[ Eval ]
[ Encoder ]
[ Mailer ]
[ Back Connection ]
[ Backdoor Server ]
[ Kernel Exploit Search ]
[ MD5 Decrypter ]
[ Reverse IP ]
[ Kill Shell ]
[ FTP Brute-Force ]
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/
usr/
src/
linux-headers-3.0.0-14/
arch/
arm/
mach-ebsa110/
include/
mach/
- drwxr-xr-x
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Viewing file: system.h (1.06 KB) -rw-r--r--Select action/file-type:  ( +) |  ( +) |  ( +) | Code ( +) | Session ( +) |  ( +) | SDB ( +) |  ( +) |  ( +) |  ( +) |  ( +) |  ( +) |
/* * arch/arm/mach-ebsa110/include/mach/system.h * * Copyright (C) 1996-2000 Russell King. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ #ifndef __ASM_ARCH_SYSTEM_H #define __ASM_ARCH_SYSTEM_H
/* * EBSA110 idling methodology: * * We can not execute the "wait for interrupt" instruction since that * will stop our MCLK signal (which provides the clock for the glue * logic, and therefore the timer interrupt). * * Instead, we spin, polling the IRQ_STAT register for the occurrence * of any interrupt with core clock down to the memory clock. */ static inline void arch_idle(void) { const char *irq_stat = (char *)0xff000000;
/* disable clock switching */ asm volatile ("mcr p15, 0, ip, c15, c2, 2" : : : "cc");
/* wait for an interrupt to occur */ while (!*irq_stat);
/* enable clock switching */ asm volatile ("mcr p15, 0, ip, c15, c1, 2" : : : "cc"); }
#define arch_reset(mode, cmd) cpu_reset(0x80000000)
#endif
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