|
System | : | Linux MiraNet 3.0.0-14-generic-pae #23-Ubuntu SMP Mon Nov 21 22:07:10 UTC 2011 i686 |
Software | : | Apache. PHP/5.3.6-13ubuntu3.10 |
ID | : | uid=65534(nobody) gid=65534(nogroup) groups=65534(nogroup)
|
|
Safe Mode | : | OFF |
Open_Basedir | : | OFF |
Freespace | : | 22.44 GB of 70.42 GB (31.86%) |
|
MySQL: ON MSSQL: OFF Oracle: OFF PostgreSQL: OFF Curl: OFF Sockets: ON Fetch: OFF Wget: ON Perl: ON |
Disabled Functions: pcntl_alarm,pcntl_fork,pcntl_waitpid,pcntl_wait,pcntl_wifexited,pcntl_wifstopped,pcntl_wifsignaled,pcntl_wexitstatus,pcntl_wtermsig,pcntl_wstopsig,pcntl_signal,pcntl_signal_dispatch,pcntl_get_last_error,pcntl_strerror,pcntl_sigprocmask,pcntl_sigwaitinfo,pcntl_sigtimedwait,pcntl_exec,pcntl_getpriority,pcntl_setpriority,
|
[ System Info ]
[ Processes ]
[ SQL Manager ]
[ Eval ]
[ Encoder ]
[ Mailer ]
[ Back Connection ]
[ Backdoor Server ]
[ Kernel Exploit Search ]
[ MD5 Decrypter ]
[ Reverse IP ]
[ Kill Shell ]
[ FTP Brute-Force ]
|
|
/
usr/
src/
linux-headers-3.0.0-14/
arch/
arm/
mach-ixp4xx/
include/
mach/
- drwxr-xr-x
|
Viewing file: cpu.h (1.65 KB) -rw-r--r--Select action/file-type:  ( +) |  ( +) |  ( +) | Code ( +) | Session ( +) |  ( +) | SDB ( +) |  ( +) |  ( +) |  ( +) |  ( +) |  ( +) |
/* * arch/arm/mach-ixp4xx/include/mach/cpu.h * * IXP4XX cpu type detection * * Copyright (C) 2007 MontaVista Software, Inc. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. * */
#ifndef __ASM_ARCH_CPU_H__ #define __ASM_ARCH_CPU_H__
#include <asm/cputype.h>
/* Processor id value in CP15 Register 0 */ #define IXP42X_PROCESSOR_ID_VALUE 0x690541c0 /* including unused 0x690541Ex */ #define IXP42X_PROCESSOR_ID_MASK 0xffffffc0
#define IXP43X_PROCESSOR_ID_VALUE 0x69054040 #define IXP43X_PROCESSOR_ID_MASK 0xfffffff0
#define IXP46X_PROCESSOR_ID_VALUE 0x69054200 /* including IXP455 */ #define IXP46X_PROCESSOR_ID_MASK 0xfffffff0
#define cpu_is_ixp42x_rev_a0() ((read_cpuid_id() & (IXP42X_PROCESSOR_ID_MASK | 0xF)) == \ IXP42X_PROCESSOR_ID_VALUE) #define cpu_is_ixp42x() ((read_cpuid_id() & IXP42X_PROCESSOR_ID_MASK) == \ IXP42X_PROCESSOR_ID_VALUE) #define cpu_is_ixp43x() ((read_cpuid_id() & IXP43X_PROCESSOR_ID_MASK) == \ IXP43X_PROCESSOR_ID_VALUE) #define cpu_is_ixp46x() ((read_cpuid_id() & IXP46X_PROCESSOR_ID_MASK) == \ IXP46X_PROCESSOR_ID_VALUE)
static inline u32 ixp4xx_read_feature_bits(void) { u32 val = ~*IXP4XX_EXP_CFG2;
if (cpu_is_ixp42x_rev_a0()) return IXP42X_FEATURE_MASK & ~(IXP4XX_FEATURE_RCOMP | IXP4XX_FEATURE_AES); if (cpu_is_ixp42x()) return val & IXP42X_FEATURE_MASK; if (cpu_is_ixp43x()) return val & IXP43X_FEATURE_MASK; return val & IXP46X_FEATURE_MASK; }
static inline void ixp4xx_write_feature_bits(u32 value) { *IXP4XX_EXP_CFG2 = ~value; }
#endif /* _ASM_ARCH_CPU_H */
|