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System | : | Linux MiraNet 3.0.0-14-generic-pae #23-Ubuntu SMP Mon Nov 21 22:07:10 UTC 2011 i686 |
Software | : | Apache. PHP/5.3.6-13ubuntu3.10 |
ID | : | uid=65534(nobody) gid=65534(nogroup) groups=65534(nogroup)
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Safe Mode | : | OFF |
Open_Basedir | : | OFF |
Freespace | : | 19.9 GB of 70.42 GB (28.27%) |
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MySQL: ON MSSQL: OFF Oracle: OFF PostgreSQL: OFF Curl: OFF Sockets: ON Fetch: OFF Wget: ON Perl: ON |
Disabled Functions: pcntl_alarm,pcntl_fork,pcntl_waitpid,pcntl_wait,pcntl_wifexited,pcntl_wifstopped,pcntl_wifsignaled,pcntl_wexitstatus,pcntl_wtermsig,pcntl_wstopsig,pcntl_signal,pcntl_signal_dispatch,pcntl_get_last_error,pcntl_strerror,pcntl_sigprocmask,pcntl_sigwaitinfo,pcntl_sigtimedwait,pcntl_exec,pcntl_getpriority,pcntl_setpriority,
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[ System Info ]
[ Processes ]
[ SQL Manager ]
[ Eval ]
[ Encoder ]
[ Mailer ]
[ Back Connection ]
[ Backdoor Server ]
[ Kernel Exploit Search ]
[ MD5 Decrypter ]
[ Reverse IP ]
[ Kill Shell ]
[ FTP Brute-Force ]
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/
usr/
src/
linux-headers-3.0.0-14/
arch/
arm/
mach-rpc/
include/
mach/
- drwxr-xr-x
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Viewing file: hardware.h (2.08 KB) -rw-r--r--Select action/file-type:  ( +) |  ( +) |  ( +) | Code ( +) | Session ( +) |  ( +) | SDB ( +) |  ( +) |  ( +) |  ( +) |  ( +) |  ( +) |
/* * arch/arm/mach-rpc/include/mach/hardware.h * * Copyright (C) 1996-1999 Russell King. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. * * This file contains the hardware definitions of the RiscPC series machines. */ #ifndef __ASM_ARCH_HARDWARE_H #define __ASM_ARCH_HARDWARE_H
#include <mach/memory.h>
#ifndef __ASSEMBLY__ #define IOMEM(x) ((void __iomem *)(unsigned long)(x)) #else #define IOMEM(x) x #endif /* __ASSEMBLY__ */
/* * What hardware must be present */ #define HAS_IOMD #define HAS_VIDC20
/* Hardware addresses of major areas. * *_START is the physical address * *_SIZE is the size of the region * *_BASE is the virtual address */ #define RAM_SIZE 0x10000000 #define RAM_START 0x10000000
#define EASI_SIZE 0x08000000 /* EASI I/O */ #define EASI_START 0x08000000 #define EASI_BASE 0xe5000000
#define IO_START 0x03000000 /* I/O */ #define IO_SIZE 0x01000000 #define IO_BASE IOMEM(0xe0000000)
#define SCREEN_START 0x02000000 /* VRAM */ #define SCREEN_END 0xdfc00000 #define SCREEN_BASE 0xdf800000
#define UNCACHEABLE_ADDR 0xdf010000
/* * IO Addresses */ #define VIDC_BASE IOMEM(0xe0400000) #define EXPMASK_BASE 0xe0360000 #define IOMD_BASE IOMEM(0xe0200000) #define IOC_BASE IOMEM(0xe0200000) #define PCIO_BASE IOMEM(0xe0010000) #define FLOPPYDMA_BASE IOMEM(0xe002a000)
#define vidc_writel(val) __raw_writel(val, VIDC_BASE)
#define IO_EC_EASI_BASE 0x81400000 #define IO_EC_IOC4_BASE 0x8009c000 #define IO_EC_IOC_BASE 0x80090000 #define IO_EC_MEMC8_BASE 0x8000ac00 #define IO_EC_MEMC_BASE 0x80000000
#define NETSLOT_BASE 0x0302b000 #define NETSLOT_SIZE 0x00001000
#define PODSLOT_IOC0_BASE 0x03240000 #define PODSLOT_IOC4_BASE 0x03270000 #define PODSLOT_IOC_SIZE (1 << 14) #define PODSLOT_MEMC_BASE 0x03000000 #define PODSLOT_MEMC_SIZE (1 << 14) #define PODSLOT_EASI_BASE 0x08000000 #define PODSLOT_EASI_SIZE (1 << 24)
#define EXPMASK_STATUS (EXPMASK_BASE + 0x00) #define EXPMASK_ENABLE (EXPMASK_BASE + 0x04)
#endif
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