|
|
| System | : | Linux MiraNet 3.0.0-14-generic-pae #23-Ubuntu SMP Mon Nov 21 22:07:10 UTC 2011 i686 |
|---|
| Software | : | Apache. PHP/5.3.6-13ubuntu3.10 |
|---|
| ID | : | uid=65534(nobody) gid=65534(nogroup) groups=65534(nogroup)
|
|---|
|
| Safe Mode | : | OFF |
|---|
| Open_Basedir | : | OFF |
|---|
| Freespace | : | 23.29 GB of 70.42 GB (33.08%) |
|---|
|
|
MySQL: ON MSSQL: OFF Oracle: OFF PostgreSQL: OFF Curl: OFF Sockets: ON Fetch: OFF Wget: ON Perl: ON |
|
Disabled Functions: pcntl_alarm,pcntl_fork,pcntl_waitpid,pcntl_wait,pcntl_wifexited,pcntl_wifstopped,pcntl_wifsignaled,pcntl_wexitstatus,pcntl_wtermsig,pcntl_wstopsig,pcntl_signal,pcntl_signal_dispatch,pcntl_get_last_error,pcntl_strerror,pcntl_sigprocmask,pcntl_sigwaitinfo,pcntl_sigtimedwait,pcntl_exec,pcntl_getpriority,pcntl_setpriority,
|
[ System Info ]
[ Processes ]
[ SQL Manager ]
[ Eval ]
[ Encoder ]
[ Mailer ]
[ Back Connection ]
[ Backdoor Server ]
[ Kernel Exploit Search ]
[ MD5 Decrypter ]
[ Reverse IP ]
[ Kill Shell ]
[ FTP Brute-Force ]
|
|
/
usr/
src/
linux-headers-3.0.0-14/
arch/
arm/
mach-w90x900/
include/
mach/
- drwxr-xr-x
|
Viewing file:  regs-timer.h (1.19 KB) -rw-r--r--Select action/file-type:  ( +) |  ( +) |  ( +) | Code ( +) | Session ( +) |  ( +) | SDB ( +) |  ( +) |  ( +) |  ( +) |  ( +) |  ( +) |
/*
* arch/arm/mach-w90x900/include/mach/regs-timer.h
*
* Copyright (c) 2008 Nuvoton technology corporation
* All rights reserved.
*
* Wan ZongShun <mcuos.com@gmail.com>
*
* Based on arch/arm/mach-s3c2410/include/mach/regs-timer.h
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
*/
#ifndef __ASM_ARCH_REGS_TIMER_H
#define __ASM_ARCH_REGS_TIMER_H
/* Timer Registers */
#define TMR_BA W90X900_VA_TIMER
#define REG_TCSR0 (TMR_BA+0x00)
#define REG_TCSR1 (TMR_BA+0x04)
#define REG_TICR0 (TMR_BA+0x08)
#define REG_TICR1 (TMR_BA+0x0C)
#define REG_TDR0 (TMR_BA+0x10)
#define REG_TDR1 (TMR_BA+0x14)
#define REG_TISR (TMR_BA+0x18)
#define REG_WTCR (TMR_BA+0x1C)
#define REG_TCSR2 (TMR_BA+0x20)
#define REG_TCSR3 (TMR_BA+0x24)
#define REG_TICR2 (TMR_BA+0x28)
#define REG_TICR3 (TMR_BA+0x2C)
#define REG_TDR2 (TMR_BA+0x30)
#define REG_TDR3 (TMR_BA+0x34)
#define REG_TCSR4 (TMR_BA+0x40)
#define REG_TICR4 (TMR_BA+0x48)
#define REG_TDR4 (TMR_BA+0x50)
#endif /* __ASM_ARCH_REGS_TIMER_H */
|
