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| System | : | Linux MiraNet 3.0.0-14-generic-pae #23-Ubuntu SMP Mon Nov 21 22:07:10 UTC 2011 i686 |
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| Software | : | Apache. PHP/5.3.6-13ubuntu3.10 |
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| ID | : | uid=65534(nobody) gid=65534(nogroup) groups=65534(nogroup)
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| Safe Mode | : | OFF |
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| Open_Basedir | : | OFF |
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| Freespace | : | 20.57 GB of 70.42 GB (29.22%) |
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MySQL: ON MSSQL: OFF Oracle: OFF PostgreSQL: OFF Curl: OFF Sockets: ON Fetch: OFF Wget: ON Perl: ON |
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Disabled Functions: pcntl_alarm,pcntl_fork,pcntl_waitpid,pcntl_wait,pcntl_wifexited,pcntl_wifstopped,pcntl_wifsignaled,pcntl_wexitstatus,pcntl_wtermsig,pcntl_wstopsig,pcntl_signal,pcntl_signal_dispatch,pcntl_get_last_error,pcntl_strerror,pcntl_sigprocmask,pcntl_sigwaitinfo,pcntl_sigtimedwait,pcntl_exec,pcntl_getpriority,pcntl_setpriority,
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[ System Info ]
[ Processes ]
[ SQL Manager ]
[ Eval ]
[ Encoder ]
[ Mailer ]
[ Back Connection ]
[ Backdoor Server ]
[ Kernel Exploit Search ]
[ MD5 Decrypter ]
[ Reverse IP ]
[ Kill Shell ]
[ FTP Brute-Force ]
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/
usr/
src/
linux-headers-3.0.0-14/
arch/
cris/
include/
arch-v32/
arch/
hwregs/
asm/
- drwxr-xr-x
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Viewing file:  intr_vect.h (1.11 KB) -rw-r--r--Select action/file-type:  ( +) |  ( +) |  ( +) | Code ( +) | Session ( +) |  ( +) | SDB ( +) |  ( +) |  ( +) |  ( +) |  ( +) |  ( +) |
/* Interrupt vector numbers autogenerated by /n/asic/design/tools/rdesc/src/rdes2intr version
from ../../inst/intr_vect/rtl/guinness/ivmask.config.r
version . */
#ifndef _______INST_INTR_VECT_RTL_GUINNESS_IVMASK_CONFIG_R
#define _______INST_INTR_VECT_RTL_GUINNESS_IVMASK_CONFIG_R
#define MEMARB_INTR_VECT 0x31
#define GEN_IO_INTR_VECT 0x32
#define IOP0_INTR_VECT 0x33
#define IOP1_INTR_VECT 0x34
#define IOP2_INTR_VECT 0x35
#define IOP3_INTR_VECT 0x36
#define DMA0_INTR_VECT 0x37
#define DMA1_INTR_VECT 0x38
#define DMA2_INTR_VECT 0x39
#define DMA3_INTR_VECT 0x3a
#define DMA4_INTR_VECT 0x3b
#define DMA5_INTR_VECT 0x3c
#define DMA6_INTR_VECT 0x3d
#define DMA7_INTR_VECT 0x3e
#define DMA8_INTR_VECT 0x3f
#define DMA9_INTR_VECT 0x40
#define ATA_INTR_VECT 0x41
#define SSER0_INTR_VECT 0x42
#define SSER1_INTR_VECT 0x43
#define SER0_INTR_VECT 0x44
#define SER1_INTR_VECT 0x45
#define SER2_INTR_VECT 0x46
#define SER3_INTR_VECT 0x47
#define P21_INTR_VECT 0x48
#define ETH0_INTR_VECT 0x49
#define ETH1_INTR_VECT 0x4a
#define TIMER_INTR_VECT 0x4b
#define BIF_ARB_INTR_VECT 0x4c
#define BIF_DMA_INTR_VECT 0x4d
#define EXT_INTR_VECT 0x4e
#endif
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